TitleArchitecture Considerations for Stochastic Computing Accelerators
Publication TypeJournal Article
Year of Publication2018
AuthorsLee V.T, Alaghi A., Pamula R., Sathe V.S, Ceze L., Oskin M.
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume37
Pagination2277–2289
ISSN0278-0070
KeywordsAccelerator architectures, Accelerators, application specific integrated circuits, approximate computing, BE computation, binary encoded computation, Correlation, embedded systems, Encoding, end-to-end accelerator architectures, energy conservation, energy efficiency, energy-optimal SC accelerators, error tolerant encoding, fully fabricated ASIC prototype, Guidelines, Image coding, power aware computing, Prototypes, stochastic computing accelerators, stochastic computing (SC), Stochastic processes, voltage overscaling, VOS
AbstractStochastic computing (SC) is an alternative computing technique for embedded systems which offers lower area and power, and better error resilience compared to binaryencoded (BE) computation. However, the potential of and general design methodologies for SC in accelerator architectures are not well-understood. In this paper, we evaluate individual SC operations, and end-to-end accelerator architectures to understand when and why SC accelerators can achieve compelling energy efficiency gains. Based on these results, we present general design guidelines that should be considered when building energy-optimal SC accelerator architectures. We also evaluate a fully fabricated ASIC prototype-the first of its kind-to empirically evaluate the error tolerance limits of voltage overscaling (VOS) in SC. Our results show that energy efficiency gains from SC primarily stem from SC's simpler datapaths which require fewer sequential elements compared to BE equivalents. This allows them to achieve energy efficiency gains as high as 2.4x and 30x at 8-bit and 4-bit fixed-point precision, respectively. We also find that VOS can improve the energy efficiency further by up to 1.9x by exploiting SC's error tolerant encoding.
DOI10.1109/TCAD.2018.2858338
Citation Keystoc-tcad18